1. Field of the Invention
The present invention relates to an inner product calculating circuit for executing a high-speed inner product calculation which is known as one of vector calculations.
2. Description of the Prior Art
An inner product calculation corresponding to one vector calculation is executed to obtain the inner product value of vectors and coefficients, which are objects to be calculated, in accordance with the following fundamental principle. It is defined in the description below that an underlined character "O" denotes an alphabetic "O", and other underlined characters "Ai", "Bi" and "Ii" denote inverted bits.
First an explanation will be given with regard to an exemplary case of finding the inner product O of two vector coefficients C0, C1 and two vectors A, B as expressed by Eq. (1) below. EQU O=C0.multidot.A+C1.multidot.B (1)
where ##EQU1##
The coefficients C0 and C1 in the above equation can be modified as follows. ##EQU2##
Therefore, Eq. (1) can be modified to the following equation. ##EQU3##
As apparent from Eq. (4), it is possible to calculate Eq. (1) under the conditions of the proviso relative thereto by executing a process of shifting the bits of the vectors A and B, a process of multiplying such vectors by "-1", and another process of adding the five partial products expressed in Eq. (4).
The first term in Eq. (4) can be modified as follows. ##EQU4##
For determining the number of bits of the inner product O in Eq. (1) to a preset value such as 13, Eq. (6) is obtained with bit extension by copying the most significant bit (code bit) in Eq. (5) to the high-order side. EQU -2.sup.1.A=(A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.3 A.sub.2 A.sub.1 A.sub.0 1).sub.2 +(1).sub.2 ( 6)
Similarly to the above, the following equation is obtained with bit extension by executing the same process with regard to the second term in Eq. (4). ##EQU5##
Similarly, Eq. (8) is obtained with bit extension by executing the same process with regard to the third term in Eq. (4). ##EQU6##
Similarly, Eq. (9) is obtained with bit extension by executing the same process with regard to the fourth term in Eq. (4). ##EQU7##
Further similarly to the above, Eq. (10) is obtained with bit extension by executing the same process with regard to the fifth term in Eq. (4). ##EQU8##
Consequently, the calculation of Eq. (4) corresponds to the following calculation executed by means of an accumulator. ##STR1##
In practically executing the calculation of Eq. (11) by a circuit, it is necessary to supply the code bits (A3, A3, B3, B3) of the partial products to the entire high-order bits in the accumulator, hence requiring in the input stage an adequate buffer which has a sufficient driving capability.
As will be understood from Eq. (11), a control circuit is needed for adding either "1" or "0" to the low-order side.
Accordingly, there arises a problem that the circuit scale is increased to a great extent in the case of executing the above inner product calculation.